Skip to main content

Overview

The BRIDGE lab focuses on interdisciplinary research to create gateways between Computer Architecture and Physical Design Automation. The phenomenal growth of integration capacity accompanied with growth in design complexity has far outpaced the development in design automation tools and widely adopted design methodologies.

Bridge Overview Figure

The BRIDGE lab investigates novel system design paradigms to build a foundation for holistic system design through design automation. The collaborative research projects span across multiple cross-disciplinary topics including energy efficiency and reliability in multicore systems, high throughput design automation, reliable NOC design and 3D IC design.

Selected Recent Publications

  • TETC-18:Prabal Basu, Pramesh Pandey, Aatreyi Bal, Chidhambaranathan Rajamanikkam,Koushik Chakraborty, Sanghamitra Roy, "TITAN: Uncovering the Paradigm Shift in Security Vulnerability at Near-Threshold Computing",IEEE Transactions on Emerging Topics in Computing, January 2018
  • DATE-18 :Aatreyi Bal, Sanghamitra Roy, and Koushik Chakraborty,"Trident: A Comprehensive Timing Error Resilient Technique against Choke Points at NTC",Proceedings of theIEEE/ACM Design Automation and Test in Europe, March 2018 (ACCEPTED)
  • MICPRO-18 :Chidhambaranathan Rajamanikkam, Kurt Brenning, Andrew Deakin, Sanghamitra Roy, Koushik Chakraborty, "TASPDetect: Reviving Trust in 3PIP By Detecting TASP Trojans",Microprocessors and Microsystems - Embedded Hardware Design 56, 2018
  • ESL-17 :Prabal Basu,Chidhambaranathan R, Aatreyi Bal, Pramesh Pandey,Trevor Carter,Koushik Chakraborty and Sanghamitra Roy,"FIFA: Exploring a Focally Induced Fault Attack Strategy in Near-Threshold Computing",IEEE Embedded Systems Letters, 2017
  • TVLSI-17:Aatreyi Bal, Shamik Saha,Sanghamitra Roy, and Koushik Chakraborty,"Dynamic Choke Sensing for Timing Error Resilience in NTC Systems."IEEE Transactions on Very Large Scale Integration (VLSI) Systems, October2017
  • HASS-17:Rajesh JayashankaraShridevi, Dean Michael Ancajas,Koushik Chakraborty and Sanghamitra Roy, "Security Measures Against a Rogue Network-on-Chip."Journal of Hardware and Systems Security, 2017
  • JOLPE-17: Asmita Pal, Aatreyi Bal, Koushik Chakraborty and Sanghamitra Roy, "Split Latency Allocator: Process Variation-Aware Register Access Latency Boost in a Near-Threshold GPU",Journal of Low Power Electronics, September2017
  • TVLSI-17:Prabal Basu, Rajesh JayashankaraShridevi, Koushik Chakraborty and Sanghamitra Roy,"IcoNoClast: Tackling Voltage Noise in the NoC Power Supply Through Flow-Control and Routing Algorithms",IEEE Transactions on Very Large Scale Integration Systems, 2017
  • DATE-17:Aatreyi Bal, Shamik Saha, Sanghamitra Roy, and Koushik Chakraborty, “Revamping Timing Error Resilience to Tackle Choke Pointsat NTCSystems,”Proceedings of the IEEE/ACM Design Automation and Test in Europe, March 2017, Lausanne, Switzerland.
  • TODAES-17: Shamik Saha, Prabal Basu, Chidhambaranathan R, Aatreyi Bal, Koushik Chakraborty, and Sanghamitra Roy, "SSAGA: SMs Synthesized for Asymmetric GPGPU Applications", ACM Transactions on Design Automation of Electronic Systems.
  • ICCAD-16:Chidhambaranathan R,Rajesh JayashankaraShridevi,Sanghamitra Roy, and Koushik Chakraborty, "BoostNoC: Power Efficient Network-on-Chip Architecture for Near Threshold Computing", IEEE/ACM International Conference on Computer-aided Design, November 2016, Austin, Texas.
  • DAC-16: Prabal Basu,Hu Chen,Shamik Saha, Koushik Chakraborty, and Sanghamitra Roy, "SwiftGPU: Fostering Energy Efficiency in a Near-Threshold GPU Through Tactical Performance Boost", Proceedings of the 53rd IEEE/ACM Design Automation Conference, June 2016, Austin, Texas.
  • DAC-16: Rajesh JayashankaraShridevi, Chidhambaranathan R,Sanghamitra Roy, and Koushik Chakraborty, "Catching the Flu: Emerging threats from a Third Party Power Management Unit", Proceedings of the 53rd IEEE/ACM Design Automation Conference, June 2016, Austin, Texas. accepted for publication.
  • DAC-16: Atif Yasin,Jeff Zhun, Siddharth Garg, Hu Chen,Sanghamitra Roy, and Koushik Chakraborty, "Synergistic Timing Speculation for Multi-threaded Programs", Proceedings of the 53rd IEEE/ACM Design Automation Conference, June 2016, Austin, Texas, accepted for publication.
  • DATE-16: Prabal Basu, Rajesh JayashankaraShridevi, Koushik Chakraborty and Sanghamitra Roy, "PRADA: Combating Voltage Noise in the NoC Power Supply Through Flow-Control and Routing Algorithms", Proceedings of the IEEE/ACM Design Automation and Test in Europe, March 2016, Dresden, Germany (Accepted for publication).
  • ISLPED-15: Rajesh JayashankaraShridevi, Dean Michael Ancajas, Koushik Chakraborty and Sanghamitra Roy, "Tackling Voltage Emergencies in NoC Through Timing Error Resilience", Proceedings of the IEEE International Symposium on Low Power Electronics and Design, July 2015, Rome, Italy, accepted for publication (Acceptance Rate 18.2%).
  • DAC-15: Hu Chen, Dieudonne Manzi, Sanghamitra Roy and Koushik Chakraborty, "Opportunistic Turbo Execution in NTC: Exploiting the Paradigm Shift in Performance Bottlenecks", Proceedings of the 52nd IEEE/ACM Design Automation Conference, June 2015, San Francisco, CA, accepted for publication.
  • CODES+ISSS-14: Dean Michael Ancajas, Koushik Chakraborty and Sanghamitra Roy, "Tackling QoS-induced Aging in Exascale Systems through Agile Path Selection", IEEE/ACM International Conference on Hardware/Software Codesign and System Synthesis (Nomination for Best Paper Award).
  • Robust L1 Cache Design.", IEEE/ACM International Symposium on Quality Electronic Design (Accepted).
  • DAC-14: Dean Michael Ancajas, Koushik Chakraborty and Sanghamitra Roy, "Fort-NoCs: Mitigating the Threat of a Compromised-NoC", IEEE/ACM 51st Design Automation Conference (Accepted).
  • DATE-14:Hu Chen, Sanghamitra Roy, and Koushik Chakraborty, "DARP: Dynamically Adaptable Resilient Pipeline Design in Microprocessors", IEEE/ACM Design Automation and Test in Europe. March 2014. Dresden, Germany.
  • DAC-13:Koushik Chakraborty, Brennan Cozzens, Sanghamitra Roy, and Dean Michael Ancajas, "Efficiently Tolerating Timing Violations in Pipelined Microprocessors", IEEE/ACM 50th Design Automation Conference (Accepted). June 2013, Austin, Texas
  • DAC-13: Dean Michael Ancajas, James McCabe Nickerson, Koushik Chakraborty, and Sanghamitra Roy, "HCI Tolerant NoC Router Micro-architecture", IEEE/ACM 50th Design Automation Conference (Accepted).June 2013, Austin, Texas
  • DAC-13: Dean Michael Ancajas, Koushik Chakraborty, and Sanghamitra Roy, "DMR3D: Dynamic Memory Relocation in 3D Multicore Systems", IEEE/ACM 50th Design Automation Conference (Accepted). June 2013, Austin, Texas
  • DATE-13:Dean Michael Ancajas, Koushik Chakraborty, and Sanghamitra Roy, "Proactive Aging Management in Heterogeneous NoCs through a Criticality-Driven Routing Approach", IEEE/ACM Design Automation and Test in Europe (Accepted)