ECE 5460: VLSI Design Automation
Introduction to basic algorithms and methodologies for automating the design of modern VLSI circuits. Emphasis on physical design problems, including partitioning, floorplanning, and place and route of VLSI circuits. Identification and formulation of CAD design problems using algorithmic paradigms, such as simulated annealing, dynamic programming, and mathematical programming. Students gain experience in the development of VLSI-CAD tools.
Prerequisite/Restriction: CS 1400, ECE 2700, students must be in the Professional Engineering Program or have Graduate Standing. Cross-listed as ECE 6460.
Semester(s) Traditionally Offered: FALL
Topics Covered: Overview of VLSI design flow, styles; Basics of MOS devices; Algorithms and data structures (Computational Complexity, Big-O notation, NP-Completeness, Graph theory and data structures); Circuit Partitioning (Kernighan-Lin algorithm, Fiduccia-Mattheyses algorith); Floorplanning (Representation using Normalized Polish Expression, Simulated Annealing algorithm, Floorplanning using mathematical programming); Placement (Simulated Annealing algorithm, Force directed Placement, Partitioning based Placement, Min-Cut Placement, Terminal propagation); Routing (Global Routing - Steiner Trees, Lee's Algorithm, Soukup's, Hadlock's Algorithm, Channel Routing - Left-edge algorithm, VCG and HCG, Constrained left-edge, Dogleg algorithm); Trends in nano-scale IC design, transistor scaling
Course Instructor: Sanghamitra Roy
Textbook: VLSI Physical Design Automation: Theory and Practice